TECH – Micron Technology has unveiled an ambitious roadmap for its next-generation DRAM and NAND memory technologies, outlining plans to introduce advanced manufacturing techniques, new materials, and vertically integrated chip architectures over the coming years. The American semiconductor manufacturer aims to improve memory density, performance, and energy efficiency while developing specialised products for increasingly demanding artificial intelligence applications. According to Tom’s Hardware, the company’s strategy includes High-NA EUV lithography, wafer bonding, and a renewed focus on customised memory solutions.
One of the most significant changes involves Micron’s decision to abandon its previous plans for 4F² DRAM memory cells, choosing instead to continue developing conventional 6F² designs. The company believes this approach offers a more practical path toward future improvements. Its upcoming 1δ manufacturing process is expected to enter mass production during the second half of 2027, delivering approximately 25% higher bit density than the current 1γ generation.
Micron is also preparing to introduce wafer bonding in its subsequent 1ε process, allowing separately manufactured silicon structures to be connected into a single memory component. Further down the roadmap, its ζÅ generation will incorporate High-NA EUV lithography to produce increasingly smaller chip features. The company is additionally exploring two generations of 3D DRAM, which would stack memory cells vertically to overcome the physical limitations of conventional designs.
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Scott DeBoer, Micron’s president and chief technology and products officer, explained the company’s long-term direction: “DRAM is nearing atomic limits at this point.” He added that Micron wants to introduce 3D DRAM when its manufacturing costs and performance become competitive with existing technologies.
Beyond conventional memory, Micron is expanding its customised High Bandwidth Memory portfolio, including HBM4E and HBM5. These products will allow customers to integrate specialised logic directly into memory components, improving efficiency for AI processors. The company is also developing vertical HBM architectures that place memory directly above processors, potentially delivering higher bandwidth and lower latency.
Meanwhile, its next-generation G11 3D NAND technology will feature more than 400 active layers, potentially doubling storage density compared with G9. Mass production is targeted for the second half of 2027.
Micron is additionally developing specialised AI-focused NAND solutions designed for high input/output performance and faster data transfers, positioning its memory technologies for increasingly sophisticated computing systems.
