TECH – Chinese semiconductor manufacturer Yangtze Memory Technologies Co. (YMTC) is preparing to expand its business beyond NAND flash storage by pursuing mass production of high-speed LPDDR5X memory capable of reaching 9,600 megatransfers per second (MT/s). The move could strengthen China’s domestic semiconductor industry while introducing another competitor into a market dominated by established memory manufacturers. According to TechPowerUp, citing research from Counterpoint Research, YMTC plans to manufacture the new memory at its Fab 3 facility in Wuhan, China.
YMTC has already been testing its capabilities in the DRAM sector. Since October 2025, the company has reportedly produced approximately 5,000 wafers per month of its 16-gigabit LPDDR5 memory operating at 7,500 MT/s at its Fab 2 facility. However, this earlier effort has focused on research and development rather than commercial mass production. The planned 9,600 MT/s version represents a substantial performance upgrade, with a theoretical data-transfer rate approximately 28% higher than that of the earlier chips.
The upcoming memory is expected to use a Vertical Channel Transistor (VCT) design paired with a 4F² cell architecture. Unlike conventional DRAM designs that arrange transistors horizontally, this approach positions transistor channels vertically, potentially reducing the area occupied by individual memory cells. In theory, the architecture could improve memory density without relying entirely on increasingly advanced manufacturing processes.
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Another important component of YMTC’s strategy is Xtacking 4.0, its proprietary wafer-bonding technology originally developed for NAND flash production. The technique allows the company to manufacture memory cells and peripheral logic circuits on separate silicon wafers before joining them through hybrid bonding. Separating these components could provide greater flexibility when optimizing performance and manufacturing efficiency.
The technology may also prove valuable as the semiconductor industry explores three-dimensional DRAM, in which memory cells are stacked vertically rather than arranged exclusively across a flat surface. YMTC’s experience with wafer bonding could provide a foundation for developing such designs in the future.
The expansion could also help YMTC navigate restrictions imposed by the United States on advanced semiconductor manufacturing equipment. Its approach to memory-cell design may offer an alternative path to improving density without depending entirely on cutting-edge lithography tools. Nevertheless, manufacturing a new architecture at commercial scale remains difficult, and theoretical advantages do not automatically translate into higher yields or lower production costs.
YMTC will also face competition from domestic rival ChangXin Memory Technologies (CXMT), which has already entered the high-speed LPDDR5X market. International manufacturers such as Samsung, SK Hynix, and Micron continue to possess extensive DRAM manufacturing experience, established customer relationships, and substantial research budgets.
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There are also differing views on the 4F² approach. Micron has indicated that it will prioritize conventional 6F² DRAM designs while preparing for a longer-term transition to 3D DRAM, reflecting concerns about the cost and complexity of alternative cell structures. YMTC’s decision to pursue 4F² technology therefore represents a calculated bet on a different route to improving memory performance and density.
For now, YMTC has not publicly confirmed a precise mass-production date, final pricing, or commercial availability for the 9,600 MT/s chips. Their eventual success will depend on whether the company can meet performance targets, achieve acceptable manufacturing yields, and attract customers beyond its existing business ecosystem.
If YMTC can overcome these hurdles, its expansion into DRAM could reshape China’s memory industry and create another challenger in the global semiconductor market, where technological independence has become almost as important as raw performance.
